
Learn the entire process from RTL to GDSII with practical insights.
Master every PD stage: Floorplanning, Placement, CTS, Routing, and Sign-off.
Get real-world experience using OpenROAD and other open-source design tools.
Learn how to achieve efficient chip performance through key optimization techniques.
Work with SkyWater 130nm and similar open-source fabrication technologies.
Get instant help and guidance whenever you need it throughout the course.
Earn a verified certificate to enhance your resume and LinkedIn profile.
Receive expert tips and mock interview support for semiconductor job preparation.
Be fully equipped to contribute to industry or research-level chip design projects.
Undergraduate/Graduate Students – Interested in VLSI & semiconductor design.
Fresh Engineers – Preparing for jobs in ASIC/SoC companies.
Researchers & Enthusiasts – Exploring EDA, CAD, and chip layout methodologies.
Professionals – Who want to skill up in physical design for better career opportunities.
Laptop/Workstation: Minimum 8GB RAM (16GB+ recommended for EDA tools)
Operating System: Linux (Ubuntu/CentOS)
Background Knowledge: Basics of Digital Logic Design and Electronics
Mindset: Patience + Practice (Physical design requires iterative debugging
ASIC PD Engineer
PrimeSilicon Technology BD Ltd
Physical Design Engineer
Neural Semiconductor Ltd
Senior SOC Engineer
Intel